net/mlx5: Don't request more than supported EQs
authorDaniel Jurgens <danielj@mellanox.com>
Thu, 5 Dec 2019 22:58:10 +0000 (16:58 -0600)
committerSaeed Mahameed <saeedm@nvidia.com>
Wed, 31 Mar 2021 20:12:23 +0000 (13:12 -0700)
commita7b76002ae78cd230ee652ccdfedf21aa94fcecc
tree29ebc7b3b1990fcada3cb7bc450e28cb71e139a3
parent6f4fdd530a09c8e2c7368ba5a5b1711e6e5ced10
net/mlx5: Don't request more than supported EQs

Calculating the number of compeltion EQs based on the number of
available IRQ vectors doesn't work now that all async EQs share one IRQ.
Thus the max number of EQs can be exceeded on systems with more than
approximately 256 CPUs. Take this into account when calculating the
number of available completion EQs.

Fixes: 81bfa206032a ("net/mlx5: Use a single IRQ for all async EQs")
Signed-off-by: Daniel Jurgens <danielj@mellanox.com>
Reviewed-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/eq.c