clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Mon, 18 Dec 2023 16:02:06 +0000 (17:02 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 25 Jan 2024 23:35:38 +0000 (15:35 -0800)
commita7a5ec56a01255e0d8ed9e692e8556d6bd2ebb65
tree429ff00d0eaed7e5a3ae584c493f44878239120b
parent62f53fe9e8c2664dea96e49bb836d2c1937e824a
clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs

[ Upstream commit 7e77a39265293ea4f05e20fff180755503c49918 ]

The PCIe GDSCs can be shared with other masters and should use the APCS
collapse-vote register when updating the power state.

This is specifically also needed to be able to disable power domains
that have been enabled by boot firmware using the vote register.

Following other recent Qualcomm platforms, describe this register and
the corresponding mask for the PCIe (and _phy) GDSCs.

Fixes: 955f2ea3b9e9 ("clk: qcom: Add GCC driver for SM8550")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-5-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/clk/qcom/gcc-sm8550.c