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(parent: e596986) | patch
[AVR] Add the pseudo instruction expansion pass
authorDylan McKay <dylanmckay34@gmail.com>
Wed, 16 Nov 2016 21:58:04 +0000 (21:58 +0000)
committerDylan McKay <dylanmckay34@gmail.com>
Wed, 16 Nov 2016 21:58:04 +0000 (21:58 +0000)
commita789f400022f4941e00142d2299e2ca0df695c63
tree7f0e04209e3ed202789b0c8eaed3d0005ca27268tree | snapshot
parente596986a44d1771d01da20d7b702da7fa1c7af15commit | diff
[AVR] Add the pseudo instruction expansion pass

Summary:
A lot of the pseudo instructions are required because LLVM assumes that
all integers of the same size as the pointer size are legal. This means
that it will not currently expand 16-bit instructions to their 8-bit
variants because it thinks 16-bit types are legal for the operations.

This also adds all of the CodeGen tests that required the pass to run.

Reviewers: arsenm, kparzysz

Subscribers: wdng, mgorny, modocache, llvm-commits

Differential Revision: https://reviews.llvm.org/D26577

llvm-svn: 287162
36 files changed:
llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp [new file with mode: 0644] blob
llvm/lib/Target/AVR/AVRTargetMachine.cpp diff | blob | history
llvm/lib/Target/AVR/CMakeLists.txt diff | blob | history
llvm/test/CodeGen/AVR/add.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/alloca.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/and.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/atomics/fence.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/atomics/load16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/atomics/load8.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/atomics/store.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/atomics/store16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/brind.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/call.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/cmp.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/com.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/directmem.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/dynalloca.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/eor.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/error-srcreg-destreg-same.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/expand-integer-failure.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/frame.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/high-pressure-on-ptrregs.ll diff | blob | history
llvm/test/CodeGen/AVR/inline-asm.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/interrupts.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/io.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/lit.local.cfg diff | blob | history
llvm/test/CodeGen/AVR/load.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/or.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/progmem.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/return.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/sext.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/store.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/sub.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/varargs.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/xor.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AVR/zext.ll [new file with mode: 0644] blob
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