[PowerPC] Stash GPR to VSR if emergency spill slot is not reachable
authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Thu, 13 Oct 2022 14:06:26 +0000 (09:06 -0500)
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Thu, 13 Oct 2022 14:06:37 +0000 (09:06 -0500)
commita77a70fa3c80518e58c68aaaf3c7159a9738f058
treeba160da192e336965f6e0e671d7505334fb6d9aa
parent4431e705ccbf25b43afd369665eb127e7f8d3ade
[PowerPC] Stash GPR to VSR if emergency spill slot is not reachable

When removing frame indices on PowerPC, we need to scavenge
a GPR to materialize a large constant if the stack offset
for the spill/reload cannot be reached by a D-Form
instruction. However, in a perfect storm of conditions,
we may not have GPR's available to scavenge, thereby
requiring an emergency spill. If such an emergency
spill also needs to be spilled to a location with a
large offset, it would itself require register scavenging
thereby creating an infinite loop.

This patch detects when the scavenger cannot scavenge
a register and the spill/reload is to a location with
a large offset. It then stashes a GPR into a VSR so
that it can use the GPR to materialize the constant
(rather than scavenging a GPR).

Fixes: https://github.com/llvm/llvm-project/issues/52894
Differential revision: https://reviews.llvm.org/D124841
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/test/CodeGen/PowerPC/pr52894-32bit.ll [new file with mode: 0644]
llvm/test/CodeGen/PowerPC/pr52894.ll [new file with mode: 0644]