net: phy: Add support for ethernet-phy-id with gpio reset
authorMichal Simek <michal.simek@xilinx.com>
Wed, 23 Feb 2022 14:45:42 +0000 (15:45 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 9 Mar 2022 11:43:16 +0000 (12:43 +0100)
commita744a284e35420077b0c838598eb24c98710412a
tree5645040c87668bc7ae5ff2b9321d08c5009589eb
parent3249116d8381a1a8f0d17c95acecd7c78b40e569
net: phy: Add support for ethernet-phy-id with gpio reset

Ethernet phy like dp83867 is using strapping resistors to setup PHY
address. On Xilinx boards strapping is setup on wires which are connected
to SOC where internal pull ups/downs influnce phy address. That's why there
is a need to setup pins properly (via pinctrl driver for example) and then
perform phy reset. I can be workarounded by reset gpio done for mdio bus
but this is not working properly when multiply phys sitting on the same
bus. That's why it needs to be done via ethernet-phy-id driver where dt
binding has gpio reset per phy.

DT binding is available here:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml

The driver is are reading the vendor and device id from valid phy node
using ofnode_read_eth_phy_id() and creating a phy device.
Kconfig PHY_ETHERNET_ID symbol is used because not every platform has gpio
support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/70ab7d71c812b2c972d48c129e416c921af0d7f5.1645627539.git.michal.simek@xilinx.com
MAINTAINERS
drivers/net/phy/Kconfig
drivers/net/phy/Makefile
drivers/net/phy/ethernet_id.c [new file with mode: 0644]
drivers/net/phy/phy.c
include/phy.h