clk: tegra: Ensure that PLLU configuration is applied properly
authorDmitry Osipenko <digetx@gmail.com>
Sun, 16 May 2021 16:30:35 +0000 (19:30 +0300)
committerThierry Reding <treding@nvidia.com>
Mon, 31 May 2021 13:16:25 +0000 (15:16 +0200)
commita7196048cd5168096c2c4f44a3939d7a6dcd06b9
tree23430c35e93adcd488bf7b5d423124f06d06b957
parentc592c8a28f5821e880ac6675781cd8a151b0737c
clk: tegra: Ensure that PLLU configuration is applied properly

The PLLU (USB) consists of the PLL configuration itself and configuration
of the PLLU outputs. The PLLU programming is inconsistent on T30 vs T114,
where T114 immediately bails out if PLLU is enabled and T30 re-enables
a potentially already enabled PLL (left after bootloader) and then fully
reprograms it, which could be unsafe to do. The correct way should be to
skip enabling of the PLL if it's already enabled and then apply
configuration to the outputs. This patch doesn't fix any known problems,
it's a minor improvement.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-pll.c