drm/msm/a6xx: Fix llcc configuration for a660 gpu
authorAkhil P Oommen <akhilpo@codeaurora.org>
Thu, 29 Jul 2021 19:51:23 +0000 (01:21 +0530)
committerRob Clark <robdclark@chromium.org>
Sat, 31 Jul 2021 15:35:23 +0000 (08:35 -0700)
commita6f24383f6c0a8d64d1f6afa10733ae4e8f236e0
tree0e22d2b3fbe4b32d03f74825674845901d2e93d5
parent4541e4f2225c30b0e9442be9eb2fb8b7086cdd1f
drm/msm/a6xx: Fix llcc configuration for a660 gpu

Add the missing scache_cntl0 register programing which is required for
a660 gpu.

Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/20210730011945.v4.1.I110b87677ef16d97397fb7c81c07a16e1f5d211e@changeid
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/a6xx_gpu.c