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(parent: 9a172b6) | patch
dt-bindings: mailbox: imx-mu: add i.MX8ULP S400 MU support
authorPeng Fan <peng.fan@nxp.com>
Fri, 22 Oct 2021 10:18:55 +0000 (18:18 +0800)
committerJassi Brar <jaswinder.singh@linaro.org>
Sat, 30 Oct 2021 03:57:10 +0000 (22:57 -0500)
commita6daa2207302162ccbaacdb32eab1286fc12124c
tree28acecc68a12d71b494a3bb2cdfabf2fda26dc7ctree | snapshot
parent9a172b62a9692c65a2eae3f3e9628d4c77d2f145commit | diff
dt-bindings: mailbox: imx-mu: add i.MX8ULP S400 MU support

Similar to i.MX8QM/QXP SCU, i.MX8ULP SCU MU is dedicated for
communication between S400 and Cortex-A cores from hardware design,
it could not be reused for other purpose. To use S400 MU more
effectivly, add "fsl,imx8ulp-mu-s4" compatile to support fast IPC.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Documentation/devicetree/bindings/mailbox/fsl,mu.yaml diff | blob | history
Domain: System / Kernel;