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(parent: 8adea9b) | patch
clk: mediatek: Add MT8167 clock support
authorFabien Parent <fparent@baylibre.com>
Fri, 18 Sep 2020 13:23:03 +0000 (15:23 +0200)
committerStephen Boyd <sboyd@kernel.org>
Tue, 13 Oct 2020 22:46:01 +0000 (15:46 -0700)
commita68224832118b32b0fd0226f7626b051c442125e
tree511cec93ec487e22e15d0f88f71d1ab1b64cd10btree | snapshot
parent8adea9b9459cf2ea9538cd0765a12200306179dfcommit | diff
clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/Kconfig diff | blob | history
drivers/clk/mediatek/Makefile diff | blob | history
drivers/clk/mediatek/clk-mt8167-aud.c [new file with mode: 0644] blob
drivers/clk/mediatek/clk-mt8167-img.c [new file with mode: 0644] blob
drivers/clk/mediatek/clk-mt8167-mfgcfg.c [new file with mode: 0644] blob
drivers/clk/mediatek/clk-mt8167-mm.c [new file with mode: 0644] blob
drivers/clk/mediatek/clk-mt8167-vdec.c [new file with mode: 0644] blob
drivers/clk/mediatek/clk-mt8167.c [new file with mode: 0644] blob
Domain: System / Kernel;