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(parent: 0869544) | patch
[RISCV] Define vadd/vsub/vrsub intrinsics and lower to V instructions.
authorHsiangkai Wang <kai.wang@sifive.com>
Fri, 11 Dec 2020 07:16:08 +0000 (15:16 +0800)
committerHsiangkai Wang <kai.wang@sifive.com>
Tue, 15 Dec 2020 04:56:49 +0000 (12:56 +0800)
commita6805a0e02c98c1065038c0c75a25c45ee29b932
tree6addaecdccaf387efee2135d3ddaaac013a8033btree | snapshot
parent086954412f5089301e5e453becd329ea2320be94commit | diff
[RISCV] Define vadd/vsub/vrsub intrinsics and lower to V instructions.

This patch is based on the proposal from Roger Ferrer Ibanez.
http://lists.llvm.org/pipermail/llvm-dev/2020-October/145850.html

Differential Revision: https://reviews.llvm.org/D93013
14 files changed:
llvm/include/llvm/IR/IntrinsicsRISCV.td diff | blob | history
llvm/lib/Target/RISCV/RISCVISelLowering.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVISelLowering.h diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td diff | blob | history
llvm/lib/Target/RISCV/RISCVMCInstLower.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVRegisterInfo.td diff | blob | history
llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h diff | blob | history
llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll [new file with mode: 0644] blob
Domain: System / Toolchain;