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(parent: 164b046) | patch
[RISCV] Add FallbackRegAltNameIndex to ABIRegAltName.
authorCraig Topper <craig.topper@sifive.com>
Wed, 22 Mar 2023 17:07:18 +0000 (10:07 -0700)
committerCraig Topper <craig.topper@sifive.com>
Wed, 22 Mar 2023 17:11:00 +0000 (10:11 -0700)
commita67e989cd2a730ea778102f2a0d965daed0182bd
treea3f77730bfeb0f77c403181001bcc8d832990842tree | snapshot
parent164b046ebfa8d7ad36ce567e2214c97e4e7b1657commit | diff
[RISCV] Add FallbackRegAltNameIndex to ABIRegAltName.

Remove now redundant fake ABI names from vector registers.

This also fixes a crash that occurs if you use fflags as an instruction
operand in the assembly and use -debug. It's not a valid register
for any instruction since this wouldn't be common. It doesn't have
an ABI name so it crashes the register printing in the debug output.
llvm/lib/Target/RISCV/RISCVRegisterInfo.td diff | blob | history
Domain: System / Toolchain;