drm/amd/display: Add interface to get Calibrated Avg Level from FIFO
authorWesley Chalmers <Wesley.Chalmers@amd.com>
Thu, 6 May 2021 17:22:19 +0000 (13:22 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Jun 2021 21:25:41 +0000 (17:25 -0400)
commita659f2fdf8b9b186c9324e05baa9e2835d47c7d2
tree455e90c1f0be607aabf1dbb75edffa88a370248d
parent9cf9498f668d4c78616ebd2fe2e5f3850b189c5b
drm/amd/display: Add interface to get Calibrated Avg Level from FIFO

[WHY]
Hardware has handed down a new sequence requiring the value of this
register be read from clk_mgr.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h
drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_sh_mask.h
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h