[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./
authorCraig Topper <craig.topper@sifive.com>
Fri, 30 Dec 2022 00:56:43 +0000 (16:56 -0800)
committerCraig Topper <craig.topper@sifive.com>
Fri, 30 Dec 2022 01:04:52 +0000 (17:04 -0800)
commita63b7247299ce6edfbbf47c4a2773e5ca7eb7f11
tree37bf8eb07fc143e0b62c82aeac8ab5e78e9d6705
parent7cd725858b4b67ca44a8d34483c28b5e12a4c733
[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

isel is now capable of turning the SUB into XOR for shift amounts.
Though it uses NOT instead of XOR with ShiftSize-1.

By using SUB during lowering we enable more DAG combines with
other arithmetic on the shift amount.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/alu64.ll
llvm/test/CodeGen/RISCV/rotl-rotr.ll
llvm/test/CodeGen/RISCV/rv32zbs.ll
llvm/test/CodeGen/RISCV/shift-amount-mod.ll
llvm/test/CodeGen/RISCV/shift-masked-shamt.ll
llvm/test/CodeGen/RISCV/shifts.ll
llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll