[X86] Fix tile config register spill issue.
authorWang, Pengfei <pengfei.wang@intel.com>
Sat, 30 Jan 2021 04:00:55 +0000 (12:00 +0800)
committerWang, Pengfei <pengfei.wang@intel.com>
Sat, 30 Jan 2021 04:53:57 +0000 (12:53 +0800)
commita5d9e0c79befb6856ae78a3c5f515287ad89a40f
tree9a478b89b814235656f03e61a6ad7174959b8f43
parentc32f3998029d52df33d060e759563e3d314ce29f
[X86] Fix tile config register spill issue.

This is an optimized approach for D94155.

Previous code build the model that tile config register is the user of
each AMX instruction. There is a problem for the tile config register
spill. When across function, the ldtilecfg instruction may be inserted
on each AMX instruction which use tile config register. This cause all
tile data register clobber.

To fix this issue, we remove the model of tile config register. Instead,
we analyze the AMX instructions between one call to another. We will
insert ldtilecfg after the first call if we find any AMX instructions.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D95136
12 files changed:
llvm/lib/Target/X86/X86ExpandPseudo.cpp
llvm/lib/Target/X86/X86FrameLowering.cpp
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86InstrAMX.td
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86PreTileConfig.cpp
llvm/lib/Target/X86/X86RegisterInfo.td
llvm/lib/Target/X86/X86TileConfig.cpp
llvm/test/CodeGen/X86/AMX/amx-across-func.ll
llvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll
llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll