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(parent: 1bdc56d) | patch
* config/rs6000/rs6000.c (rs6000_emit_sync): For QI or HI mode
authorjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 30 Aug 2007 08:25:36 +0000 (08:25 +0000)
committerjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 30 Aug 2007 08:25:36 +0000 (08:25 +0000)
commita5a5e7f1823e3b1f544c67a123fabb1629d6b388
tree47d702ba085795189fe469e869366223fc7c596ctree | snapshot
parent1bdc56d27e00c8a38a0aa64e9119c910019c3382commit | diff
* config/rs6000/rs6000.c (rs6000_emit_sync): For QI or HI mode
used_m, even if it is 32-bit aligned, adjust used_m MEM to have
SImode and update m.  Don't run gen_lowpart_common on arbitrary
memory address, force it to register first.

* gcc.dg/sync-2.c (AI_ALIGN): Define if not defined.
(AI): Add AI_ALIGN.
* gcc.dg/sync-3.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@127922 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog diff | blob | history
gcc/config/rs6000/rs6000.c diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.dg/sync-2.c diff | blob | history
gcc/testsuite/gcc.dg/sync-3.c [new file with mode: 0644] blob
Domain: System / Toolchain;