ARM: imx: pllv1: Fix PLL calculation for i.MX27
authorAlexander Shiyan <shc_work@mail.ru>
Sun, 10 Nov 2013 09:34:49 +0000 (13:34 +0400)
committerShawn Guo <shawn.guo@linaro.org>
Tue, 31 Dec 2013 01:36:29 +0000 (09:36 +0800)
commita594790368a89165b92d7146aac2223b5a37637e
tree30abe1a53da130da596673ee924aa61c1def0332
parent630a212501653d046b61015a4d0f9e3db65382cc
ARM: imx: pllv1: Fix PLL calculation for i.MX27

MFN bit 9 on i.MX27 has a different meaning than in other SOCs. This
is a just sign bit. This patch makes different calculation for i.MX27.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-imx/clk-pllv1.c