hwmon: sfctemp: Fix the problem that cannot disable sfctemp after enabling PM

hwmon: sfctemp: Fix the problem that cannot disable sfctemp after enabling PM

[runtime_pm off]

After Linux starts, it will enable clk and put tempsensor in standby state.
When 'cat /sys/class/hwmon/hwmon0/temp1_input' is executed, will switch to
the run state, and return the value of the sensor after the interrupt is
generated.

$ cat /sys/kernel/debug/clk/clk_summary | grep "temp_sensor"
                      enable  prepare  protect                               duty  hardware
clock                  count    count    count      rate  accuracy   phase  cycle    enable
-------------------------------------------------------------------------------------------
u0_temp_sensor_clk_temp	   1	   1        0    1000000	0	 0   50000	  Y
u0_temp_sensor_clk_apb0	   1	   1	    0	49500000	0	 0   50000	  Y

$ cat /sys/class/hwmon/hwmon0/temp1_input
46135
$ cat /sys/class/hwmon/hwmon0/temp1_enable
1

You can 'echo 0 >/sys/class/hwmon/hwmon0/temp1_enable' to turn off the
tempsensor and clk.

$ echo 0 > /sys/class/hwmon/hwmon0/temp1_enable
$ cat /sys/kernel/debug/clk/clk_summary | grep "temp_sensor"
                      enable  prepare  protect                               duty  hardware
clock                  count    count    count      rate  accuracy   phase  cycle    enable
-------------------------------------------------------------------------------------------
u0_temp_sensor_clk_temp	   0	   0        0    1000000	0	 0   50000	  N
u0_temp_sensor_clk_apb0	   0	   0	    0	49500000	0	 0   50000	  N

$ cat /sys/class/hwmon/hwmon0/temp1_enable
0
$ cat /sys/class/hwmon/hwmon0/temp1_input
cat: read error: No data available

[runtime_pm on]

When runtime_pm is turned on, sfctemp will automatically enter
the suspend state and close clk after the system is started.

$ cat /sys/kernel/debug/clk/clk_summary | grep "temp_sensor"
                      enable  prepare  protect                               duty  hardware
clock                  count    count    count      rate  accuracy   phase  cycle    enable
-------------------------------------------------------------------------------------------
u0_temp_sensor_clk_temp	   0	   0        0    1000000	0	 0   50000	  N
u0_temp_sensor_clk_apb0	   0	   0	    0	49500000	0	 0   50000	  N

when 'cat /sys/class/hwmon/hwmon0/temp1_input', it will call
starfive_temp_resume, enable clk and put sfctemp into power on state.
$ cat /sys/class/hwmon/hwmon0/temp1_input
46235

After the interrupt is generated and the sensor value is obtained, it
will enter the suspend state again. so, hardware-enable-stats is always 'N'.

Of course, in this mode (runtime_pm on), it also supports the opening
and closing of functions (in fact, clk is not directly operated, and the
opening and closing of clk are controlled by runtime_pm)

$ cat /sys/class/hwmon/hwmon0/temp1_input
46235
$ cat /sys/class/hwmon/hwmon0/temp1_enable
1

$ echo 0 > /sys/class/hwmon/hwmon0/temp1_enable
$ cat /sys/class/hwmon/hwmon0/temp1_enable
0
$ cat /sys/class/hwmon/hwmon0/temp1_input
cat: read error: No data available

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>