[Hexagon] Separate Hexagon subreg indices for different register classes
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>
Wed, 9 Nov 2016 16:19:08 +0000 (16:19 +0000)
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>
Wed, 9 Nov 2016 16:19:08 +0000 (16:19 +0000)
commita540997ce476944edc5962ffec6649b1640a057f
tree8b0dfb2d93e5da9363aa027bc0eab2e3e366669c
parent13f4a91a1fe9341812bf698f4fa6b5cb2a37ebd0
[Hexagon] Separate Hexagon subreg indices for different register classes

For pairs of 32-bit registers: isub_lo, isub_hi.
For pairs of vector registers: vsub_lo, vsub_hi.

Add generic subreg indices: ps_sub_lo, ps_sub_hi, and a function
  HexagonRegisterInfo::getHexagonSubRegIndex(RegClass, GenericSubreg)
that returns the appropriate subreg index for RegClass.

llvm-svn: 286377
25 files changed:
llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td
llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td
llvm/lib/Target/Hexagon/HexagonPatterns.td
llvm/lib/Target/Hexagon/HexagonPeephole.cpp
llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
llvm/lib/Target/Hexagon/HexagonRegisterInfo.h
llvm/lib/Target/Hexagon/HexagonRegisterInfo.td
llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
llvm/test/CodeGen/Hexagon/expand-condsets-def-undef.mir
llvm/test/CodeGen/Hexagon/regalloc-bad-undef.mir