perf/x86: Enable free running PEBS for REGS_USER/INTR
authorAndi Kleen <ak@linux.intel.com>
Thu, 31 Aug 2017 21:46:30 +0000 (14:46 -0700)
committerIngo Molnar <mingo@kernel.org>
Fri, 29 Sep 2017 11:28:31 +0000 (13:28 +0200)
commita47ba4d77e1236d214e5116b5631bc4c2d6e6369
treec25297465b2d24b40484fbf020d37db3194863a7
parent5bce9db1894c998c5b85a34036d679ea6517668f
perf/x86: Enable free running PEBS for REGS_USER/INTR

Currently free running PEBS is disabled when user or interrupt
registers are requested. Most of the registers are actually
available in the PEBS record and can be supported.

So we just need to check for the supported registers and then
allow it: it is all except for the segment register.

For user registers this only works when the counter is limited
to ring 3 only, so this also needs to be checked.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20170831214630.21892-1-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/core.c
arch/x86/events/perf_event.h