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[RISCV] Add MIR tests exposing missed InstAliases
authorFraser Cormack <fraser@codeplay.com>
Fri, 27 Nov 2020 14:29:58 +0000 (14:29 +0000)
committerFraser Cormack <fraser@codeplay.com>
Mon, 14 Mar 2022 17:53:07 +0000 (17:53 +0000)
commita44aeab5261eceead4111b263adf79934c784754
treedf95bf92ce2359923ca40906f42a512e7fa23f38tree | snapshot
parent849e749d7f82cba44bccf6261239139bc9019754commit | diff
[RISCV] Add MIR tests exposing missed InstAliases

The InstAlias framework cannot match registers against zero_reg, which
RVV uses to encode unmasked operations.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D92228
llvm/test/CodeGen/RISCV/rvv/aliases.mir [new file with mode: 0644] blob
Domain: System / Toolchain;