drm/i915/dsi: Gate DSI clocks earlier
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 8 Jun 2023 20:30:49 +0000 (23:30 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 13 Jun 2023 16:04:25 +0000 (19:04 +0300)
commita43d92812077b15c8e3bfdf80dc9d8596b503c60
treecb4c8decf5d94797efcb5497de6bc6554c537f8d
parentd4121327ac6af65327c1ae90bac89e1575f0f277
drm/i915/dsi: Gate DSI clocks earlier

The clock gating step is in the wrong spot compared to the
TGL+ bspec sequence. Move it the right place. Windows also
seems to use the TGL+ order here always.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230608203057.23759-6-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/display/icl_dsi.c