RISC-V: Add BeagleV Starlight Beta device tree
authorEmil Renner Berthing <kernel@esmil.dk>
Sun, 10 Oct 2021 17:48:36 +0000 (19:48 +0200)
committerEmil Renner Berthing <kernel@esmil.dk>
Thu, 16 Dec 2021 16:24:23 +0000 (17:24 +0100)
commita43676272a6e0b398781bc5337ca4cc187ba923d
tree2a0432b6f2fa4ae090bb252e1ced2a377fe4eca2
parentec85362fb121d0297b9f3bb56816ea6282c34fda
RISC-V: Add BeagleV Starlight Beta device tree

Add initial device tree for the BeagleV Starlight Beta board. About 300
of these boards were sent out as part of a now cancelled BeagleBoard.org
project.

I2C timing data is based on the device tree in the vendor u-boot port.
Heartbeat LED added by Geert.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Co-developed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
arch/riscv/boot/dts/Makefile
arch/riscv/boot/dts/starfive/Makefile [new file with mode: 0644]
arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts [new file with mode: 0644]