perf/x86/intel: Add Crestmont PMU
authorKan Liang <kan.liang@linux.intel.com>
Mon, 22 May 2023 11:30:35 +0000 (04:30 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Wed, 9 Aug 2023 19:51:07 +0000 (21:51 +0200)
commita430021faad6b4fa86c820fc3e7f8dbfc2f14fb4
tree55ac2e149f7e81a0dfe068be40418905ab063e87
parent535445621a66faa7050c21d9d668595116285648
perf/x86/intel: Add Crestmont PMU

The Grand Ridge and Sierra Forest are successors to Snow Ridge. They
both have Crestmont core. From the core PMU's perspective, they are
similar to the e-core of MTL. The only difference is the LBR event
logging feature, which will be implemented in the following patches.

Create a non-hybrid PMU setup for Grand Ridge and Sierra Forest.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lore.kernel.org/r/20230522113040.2329924-1-kan.liang@linux.intel.com
arch/x86/events/intel/core.c
arch/x86/events/intel/ds.c
arch/x86/events/perf_event.h