mmc: sdhci-of-arasan: Fix clock registration error for Keem Bay SOC

mmc: sdhci-of-arasan: Fix clock registration error for Keem Bay SOC

The commit 16ada730a759 ("mmc: sdhci-of-arasan: Modify clock operations
handling") introduced support for platform specific clock operations.
Around the same point in time the commit 36c6aadaae86 ("mmc:
sdhci-of-arasan: Add support for Intel Keem Bay") was also  merged.
Unfortunate it was not really tested on top of the previously mentioned
commit, which causes clock registration failures for Keem Bay SOC devices.

Let's fix this, by properly declaring the clock operation for Keem Bay SOC
devices.

Fixes: 36c6aadaae86 ("mmc: sdhci-of-arasan: Add support for Intel Keem Bay")
Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201118120120.24908-2-muhammad.husaini.zulkifli@intel.com
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>