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[AArch64] Fix UB about shift amount exceeds data bit-width
authorWeiming Zhao <weimingz@codeaurora.org>
Thu, 8 Mar 2018 00:28:25 +0000 (00:28 +0000)
committerWeiming Zhao <weimingz@codeaurora.org>
Thu, 8 Mar 2018 00:28:25 +0000 (00:28 +0000)
commita4259cd3a6268d6b7e27acd45fd6f114e2ac9ac2
treee9723a0ae0cb207ea811fc2464bf96f440e8febbtree | snapshot
parentab1e5a187dd92d805bbbef6fb680273b7a2ee3d8commit | diff
[AArch64] Fix UB about shift amount exceeds data bit-width

Summary:
Fixes an UB caught by sanitizer. The shift amount might be larger than 32 so the operand should be 1ULL.
In this patch,  we replace the original expression with  existing API with uint64_t type.

Reviewers: eli.friedman, rengolin

Reviewed By: rengolin

Subscribers: rengolin, javed.absar, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D44234

llvm-svn: 326969
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp diff | blob | history
Domain: System / Toolchain;