[X86] When storing v1i1/v2i1/v4i1 to memory, make sure we store zeros in the rest...
authorCraig Topper <craig.topper@sifive.com>
Fri, 13 Nov 2020 04:18:50 +0000 (20:18 -0800)
committerCraig Topper <craig.topper@sifive.com>
Fri, 13 Nov 2020 05:28:18 +0000 (21:28 -0800)
commita4124e455e641db1e18d4221d2dacb31953fd13b
treeef0ab431e0a682f7e3b9dfc073494779a12cc800
parent77efb73c672762ce28cfff793db414ce05e3c46a
[X86] When storing v1i1/v2i1/v4i1 to memory, make sure we store zeros in the rest of the byte

We can't store garbage in the unused bits. It possible that something like zextload from i1/i2/i4 is created to read the memory. Those zextloads would be legalized assuming the extra bits are 0.

I'm not sure that the code in lowerStore is executed for the v1i1/v2i1/v4i1 case. It looks like the DAG combine in combineStore may have converted them to v8i1 first. And I think we're missing some cases to avoid going to the stack in the first place. But I don't have time to investigate those things at the moment so I wanted to focus on the correctness issue.

Should fix PR48147.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D91294
13 files changed:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/test/CodeGen/X86/avx512-extract-subvector-load-store.ll
llvm/test/CodeGen/X86/avx512-load-trunc-store-i1.ll
llvm/test/CodeGen/X86/avx512-mask-op.ll
llvm/test/CodeGen/X86/avx512-select.ll
llvm/test/CodeGen/X86/stack-folding-avx512vp2intersect.ll
llvm/test/CodeGen/X86/vec_saddo.ll
llvm/test/CodeGen/X86/vec_smulo.ll
llvm/test/CodeGen/X86/vec_ssubo.ll
llvm/test/CodeGen/X86/vec_uaddo.ll
llvm/test/CodeGen/X86/vec_umulo.ll
llvm/test/CodeGen/X86/vec_usubo.ll