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(parent: 92d10ff) | patch
clk: starfive: jh7110-sys: Set PLL0 rate to 1.5GHz
authorJaehoon Chung <jh80.chung@samsung.com>
Fri, 18 Aug 2023 04:19:55 +0000 (13:19 +0900)
committerJaehoon Chung <jh80.chung@samsung.com>
Mon, 19 Feb 2024 00:13:47 +0000 (09:13 +0900)
commita3958c271c2d59eef1f198cd8eda75f9b022c130
tree4c14ae7722592c243f7eacd04316bff80aec02batree | snapshot
parent92d10ff288e9c620fedb5e5184f1d8ee02deb6d2commit | diff
clk: starfive: jh7110-sys: Set PLL0 rate to 1.5GHz

Set PLL0 rate to 1.5GHz. Change the parent of cpu_root clock
and the divider of cpu_core before setting.

This patch is taken from patch that was posted on mailing.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Change-Id: Ib418a6321555c045effcb0580e0c91d80a7a2043
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
drivers/clk/starfive/clk-starfive-jh7110-sys.c diff | blob | history
Domain: System / Kernel;