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RISC-V: Use WRITE_ONCE instead of direct access
authorAtish Patra <atish.patra@wdc.com>
Tue, 2 Oct 2018 19:15:03 +0000 (12:15 -0700)
committerPalmer Dabbelt <palmer@sifive.com>
Tue, 23 Oct 2018 00:03:37 +0000 (17:03 -0700)
commita37d56fc401108f39dec9ba83ed923a453937a26
treeb050e592dc352a44bddc333ead5602abbab2e7a4tree | snapshot
parent46373cb442c56d2f8a4c8b3f777c89d20546c9d5commit | diff
RISC-V: Use WRITE_ONCE instead of direct access

The secondary harts spin on couple of per cpu variables until both of
these are non-zero so it's not necessary to have any ordering here.
However, WRITE_ONCE should be used to avoid tearing.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
arch/riscv/kernel/smpboot.c diff | blob | history
Domain: System / Kernel;