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[AMDGPU][GFX11] Mitigate VALU mask write hazard
authorCarl Ritson <carl.ritson@amd.com>
Sat, 1 Oct 2022 00:17:42 +0000 (09:17 +0900)
committerCarl Ritson <carl.ritson@amd.com>
Sat, 1 Oct 2022 07:21:24 +0000 (16:21 +0900)
commita35013bec68db2cc3760c693dc4cb080f312396a
tree1d7db89c0f14197e056d6d836e007a09603a4b7ctree | snapshot
parenta5c46bf9521e34d7f8c6fa048014912afb910020commit | diff
[AMDGPU][GFX11] Mitigate VALU mask write hazard

VALU use of an SGPR (pair) as mask followed by SALU write to the
same SGPR can cause incorrect execution of subsequent SALU reads
of the SGPR.

Reviewed By: foad, rampitec

Differential Revision: https://reviews.llvm.org/D134151
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp diff | blob | history
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h diff | blob | history
llvm/lib/Target/AMDGPU/GCNSubtarget.h diff | blob | history
llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir [new file with mode: 0644] blob
Domain: System / Toolchain;