projects / platform / kernel / linux-rpi.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 9adddb0) | patch
clk: vc5: Add bindings for IDT VersaClock 5P49V5935
authorAlexey Firago <alexey_firago@mentor.com>
Fri, 7 Apr 2017 09:12:23 +0000 (12:12 +0300)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 19 Apr 2017 16:08:48 +0000 (09:08 -0700)
commita330b6f5d1aee83fb2554d00ad33877b91a74c0c
tree9d5288e5e49b7cd9a346cd12f01a2422ae3437aftree | snapshot
parent9adddb01ce5f71ae5c26b8aff01335d40be55133commit | diff
clk: vc5: Add bindings for IDT VersaClock 5P49V5935

IDT VersaClock 5 5P49V5935 has 4 clock outputs, 4 fractional dividers.
Input clock source can be taken from either integrated crystal or from
external reference clock.

Signed-off-by: Alexey Firago <alexey_firago@mentor.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Documentation/devicetree/bindings/clock/idt,versaclock5.txt diff | blob | history
Domain: System / Kernel;