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KVM: x86/pmu: Update comments for AMD gp counters
authorLike Xu <likexu@tencent.com>
Wed, 18 May 2022 13:25:02 +0000 (21:25 +0800)
committerPaolo Bonzini <pbonzini@redhat.com>
Wed, 8 Jun 2022 08:48:43 +0000 (04:48 -0400)
commita33095f4937b362306f8636742450cff1c4630af
tree31368c2d2e9c1ef580b2fe4ee877b026c806357etree | snapshot
parentd1c88a4020567ba4da52f778bcd9619d87e4ea75commit | diff
KVM: x86/pmu: Update comments for AMD gp counters

The obsolete comment could more accurately state that AMD platforms
have two base MSR addresses and two different maximum numbers
for gp counters, depending on the X86_FEATURE_PERFCTR_CORE feature.

Signed-off-by: Like Xu <likexu@tencent.com>
Message-Id: <20220518132512.37864-2-likexu@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/pmu.c diff | blob | history
Domain: System / Kernel;