ASoC: tegra: fix maxburst settings in dmaengine code
authorStephen Warren <swarren@nvidia.com>
Thu, 6 Sep 2012 23:47:33 +0000 (17:47 -0600)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Fri, 7 Sep 2012 01:52:02 +0000 (09:52 +0800)
commita32826e4aefa905b392d2d862d51365d50d4829b
tree3a3403726f2f43f5753d3a29619cc32d7639ce07
parent57b2d68863f281737d8596cb3d76d89d9cc54fd8
ASoC: tegra: fix maxburst settings in dmaengine code

The I2S controllers are programmed with an "attention" level of 4 DWORDs.
This must match the configuration passed to the DMA driver, so that when
they burst in data, they don't overflow the available FIFO space. Also,
the burst size is relevant to the destination for playback, and source
for capture, not vice-versa as originally written.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
sound/soc/tegra/tegra_pcm.c