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(parent: 4a376ec) | patch
x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors
authorAndreas Herrmann <andreas.herrmann3@amd.com>
Thu, 3 Sep 2009 07:41:19 +0000 (09:41 +0200)
committerH. Peter Anvin <hpa@zytor.com>
Thu, 3 Sep 2009 22:10:03 +0000 (15:10 -0700)
commita326e948c538e8ce998f30d92e146ecea8a30421
tree9f02a50b8b3ff3a14352d4f0e378fc13c8852862tree | snapshot
parent4a376ec3a2599c02207cd4cbd5dbf73783548463commit | diff
x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors

L3 cache size, associativity and shared_cpu information need to be
adapted to show information for an internal node instead of the
entire physical package.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
arch/x86/kernel/cpu/intel_cacheinfo.c diff | blob | history
Domain: System / Uncategorized;