drm/i915: FPGA_DBG is display-specific
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 12 Feb 2021 22:20:49 +0000 (14:20 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Sat, 13 Feb 2021 02:42:43 +0000 (18:42 -0800)
commita321c3c6d8dda2a34d4b5d76115a9a42f67158a3
tree74a5c4faf6dd7cc427756f54badec8cdcac09e2a
parent70da7521e11939ebf2e3d2b4cd91d30d0d02e3c4
drm/i915: FPGA_DBG is display-specific

Although the bspec's description doesn't make it very clear, the
hardware architects have confirmed that the FPGA_DBG register that we
use to check for unclaimed MMIO accesses is display-specific and will
only properly flag unclaimed MMIO transactions for registers in the
display range.  If a platform doesn't have display, FPGA_DBG itself will
not be available and should not be checked.  Let's move the feature flag
into intel_device_info.display to more accurately reflect this.

Given that we now know FPGA_DBG is display-specific, it could be argued
that we should only check it on out intel_de_*() functions.  However
let's not make that change right now; keeping the checks in all of the
existing locations still helps us catch cases where regular
intel_uncore_*() functions use bad MMIO offset math / base addresses and
accidentally wind up landing within an unused area within the display
MMIO range.  It will also help catch cases where userspace-initiated
MMIO (e.g., IGT's intel_reg tool) attempt to read bad offsets within the
display range.

v2:  Add missing hunk with the update to the HAS_FPGA_DBG_UNCLAIMED
     macro.  (CI)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210212222049.3516344-1-matthew.d.roper@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.h