[RISCV] Fold store of vmv.x.s to a vse with VL=1.
authorCraig Topper <craig.topper@sifive.com>
Mon, 27 Sep 2021 16:45:30 +0000 (09:45 -0700)
committerCraig Topper <craig.topper@sifive.com>
Mon, 27 Sep 2021 16:54:46 +0000 (09:54 -0700)
commita2a07e8db3bf64440f24d9d6408df214886826de
tree332c1284f99df8b22741843041483909ccbca0af
parent2bf06d9345caeb26520be8e830c092683bbdf0f7
[RISCV] Fold store of vmv.x.s to a vse with VL=1.

This can avoid a loss of decoupling with the scalar unit on cores
with decoupled scalar and vector units.

We should support FP too, but those use extract_element and not a
custom ISD node so it is a little different. I also left a FIXME
in the test for i64 extract and store on RV32.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D109482
llvm/include/llvm/CodeGen/SelectionDAG.h
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll