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[RISCV] Add explicit i64 types to RV64 isel patterns to stop tablegen from generating...
authorCraig Topper <craig.topper@sifive.com>
Mon, 8 Mar 2021 17:00:17 +0000 (09:00 -0800)
committerCraig Topper <craig.topper@sifive.com>
Mon, 8 Mar 2021 17:06:56 +0000 (09:06 -0800)
commita2651266c5eb08f9dcb059247a35b1ce88ad148e
treeef7a29b6219663292ef26a48d3a64afc9def4210tree | snapshot
parente68fafa49f91c5e775605cbbde0815fc4809bf46commit | diff
[RISCV] Add explicit i64 types to RV64 isel patterns to stop tablegen from generating unneeded i32 patterns for RV32 HwMode.
llvm/lib/Target/RISCV/RISCVInstrInfo.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoA.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoM.td diff | blob | history
Domain: System / Toolchain;