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(parent: f6bcbf3) | patch
[x86/SLH] Add an assert to catch if we ever end up trying to harden
authorChandler Carruth <chandlerc@gmail.com>
Sat, 14 Jul 2018 00:52:09 +0000 (00:52 +0000)
committerChandler Carruth <chandlerc@gmail.com>
Sat, 14 Jul 2018 00:52:09 +0000 (00:52 +0000)
commita24fe067c0ae7664a662117f0fe3e4cdad0e7e43
tree655887c674ea1307b4ca09e4eeb0129557c6bf6dtree | snapshot
parentf6bcbf3d88c5af10cc40c7cd031cc53a3b1cad36commit | diff
[x86/SLH] Add an assert to catch if we ever end up trying to harden
post-load a register that isn't valid for use with OR or SHRX.

llvm-svn: 337078
llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp diff | blob | history
Domain: System / Toolchain;