review.tizen.org Git - platform/upstream/dotnet/runtime.git/commit

projects / platform / upstream / dotnet / runtime.git / commit

author	Egor Chesakov <Egor.Chesakov@microsoft.com>
	Wed, 17 Jun 2020 19:05:02 +0000 (12:05 -0700)
committer	GitHub <noreply@github.com>
	Wed, 17 Jun 2020 19:05:02 +0000 (12:05 -0700)
commit	a23d3b2f06db2a1f48518e898d54ad8b252303a7
tree	06481f8b7ccbc8a7acf31f836e5de245a8f46ce0	tree \| snapshot
parent	469195e1e6a408c215b7b335b7455dfb66a4ccab	commit \| diff

[Arm64] ASIMD By Element Intrinsics (#36916)

* FusedMultiplyAddByScalar

* FusedMultiplyAddBySelectedScalar

* FusedMultiplyAddScalarBySelectedScalar

* FusedMultiplySubtractByScalar

* FusedMultiplySubtractBySelectedScalar

* FusedMultiplySubtractScalarBySelectedScalar

* InsertSelectedScalar

* LoadAndInsertScalar

* LoadAndReplicateToVector128

* LoadAndReplicateToVector64

* MultiplyAddByScalar

* MultiplyAddBySelectedScalar

* MultiplyByScalar

* MultiplyBySelectedScalar

* MultiplyBySelectedScalarWideningLower

* MultiplyBySelectedScalarWideningLowerAndAdd

* MultiplyBySelectedScalarWideningLowerAndSubtract

* MultiplyBySelectedScalarWideningUpper

* MultiplyBySelectedScalarWideningUpperAndAdd

* MultiplyBySelectedScalarWideningUpperAndSubtract

* MultiplyExtendedByScalar

* MultiplyExtendedBySelectedScalar

* MultiplyExtendedScalarBySelectedScalar

* MultiplyScalarBySelectedScalar

* MultiplySubtractByScalar

* MultiplySubtractBySelectedScalar

* StoreSelectedScalar

432 files changed:

src/coreclr/src/jit/codegenarm64.cpp		diff \| blob \| history
src/coreclr/src/jit/compiler.h		diff \| blob \| history
src/coreclr/src/jit/emitarm64.cpp		diff \| blob \| history
src/coreclr/src/jit/gentree.cpp		diff \| blob \| history
src/coreclr/src/jit/gentree.h		diff \| blob \| history
src/coreclr/src/jit/hwintrinsic.cpp		diff \| blob \| history
src/coreclr/src/jit/hwintrinsic.h		diff \| blob \| history
src/coreclr/src/jit/hwintrinsicarm64.cpp		diff \| blob \| history
src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp		diff \| blob \| history
src/coreclr/src/jit/hwintrinsiccodegenxarch.cpp		diff \| blob \| history
src/coreclr/src/jit/hwintrinsiclistarm64.h		diff \| blob \| history
src/coreclr/src/jit/hwintrinsicxarch.cpp		diff \| blob \| history
src/coreclr/src/jit/lowerarmarch.cpp		diff \| blob \| history
src/coreclr/src/jit/lsraarm64.cpp		diff \| blob \| history
src/coreclr/src/jit/optcse.cpp		diff \| blob \| history
src/coreclr/src/jit/target.h		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part0_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part0_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part1_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part1_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddByScalar.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddByScalar.Vector128.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddByScalar.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddBySelectedScalar.Vector128.Double.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddBySelectedScalar.Vector128.Single.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddBySelectedScalar.Vector128.Single.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddBySelectedScalar.Vector64.Single.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddBySelectedScalar.Vector64.Single.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddScalarBySelectedScalar.Vector64.Double.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddScalarBySelectedScalar.Vector64.Single.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplyAddScalarBySelectedScalar.Vector64.Single.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractByScalar.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractByScalar.Vector128.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractByScalar.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractBySelectedScalar.Vector128.Double.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractBySelectedScalar.Vector128.Single.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractBySelectedScalar.Vector128.Single.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractBySelectedScalar.Vector64.Single.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractBySelectedScalar.Vector64.Single.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractScalarBySelectedScalar.Vector64.Double.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractScalarBySelectedScalar.Vector64.Single.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/FusedMultiplySubtractScalarBySelectedScalar.Vector64.Single.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Byte.15.Vector128.Byte.15.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Byte.15.Vector64.Byte.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Double.1.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Int16.7.Vector128.Int16.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Int16.7.Vector64.Int16.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Int32.3.Vector128.Int32.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Int32.3.Vector64.Int32.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Int64.1.Vector128.Int64.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.SByte.15.Vector128.SByte.15.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.SByte.15.Vector64.SByte.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Single.3.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.Single.3.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.UInt16.7.Vector128.UInt16.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.UInt16.7.Vector64.UInt16.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.UInt32.3.Vector128.UInt32.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.UInt32.3.Vector64.UInt32.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector128.UInt64.1.Vector128.UInt64.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.Byte.7.Vector128.Byte.15.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.Byte.7.Vector64.Byte.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.Int16.3.Vector128.Int16.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.Int16.3.Vector64.Int16.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.Int32.1.Vector128.Int32.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.Int32.1.Vector64.Int32.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.SByte.7.Vector128.SByte.15.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.SByte.7.Vector64.SByte.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.Single.1.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.Single.1.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.UInt16.3.Vector128.UInt16.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.UInt16.3.Vector64.UInt16.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.UInt32.1.Vector128.UInt32.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/InsertSelectedScalar.Vector64.UInt32.1.Vector64.UInt32.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/LoadAndReplicateToVector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/LoadAndReplicateToVector128.Int64.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/LoadAndReplicateToVector128.UInt64.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyByScalar.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyBySelectedScalar.Vector128.Double.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtendedByScalar.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtendedBySelectedScalar.Vector128.Double.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtendedScalarBySelectedScalar.Vector64.Double.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtendedScalarBySelectedScalar.Vector64.Single.Vector128.Single.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtendedScalarBySelectedScalar.Vector64.Single.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyScalarBySelectedScalar.Vector64.Double.Vector128.Double.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/Program.AdvSimd.Arm64_Part0.cs		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/Program.AdvSimd.Arm64_Part1.cs		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part1_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part1_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part2_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part2_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part3_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part3_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part4_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part4_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part5_r.csproj	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_Part5_ro.csproj	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector128.Byte.8.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V128.Byte.8.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector128.Int16.4.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V128.Int16.4.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector128.Int32.2.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V128.Int32.2.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector128.SByte.8.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V128.SByte.8.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector128.Single.2.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V128.Single.2.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector128.UInt16.4.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V128.UInt16.4.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector128.UInt32.2.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V128.UInt32.2.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector64.Byte.1.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V64.Byte.1.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector64.Int16.1.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V64.Int16.1.cs with 96% similarity]	diff \| blob \| history
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src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.Vector64.Single.1.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector128.V64.Single.1.cs with 96% similarity]	diff \| blob \| history
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src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.Vector128.Single.2.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.V128.Single.2.cs with 96% similarity]	diff \| blob \| history
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src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.Vector128.UInt32.2.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.V128.UInt32.2.cs with 96% similarity]	diff \| blob \| history
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src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.Vector64.Int32.1.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.V64.Int32.1.cs with 96% similarity]	diff \| blob \| history
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src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.Vector64.UInt16.1.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.V64.UInt16.1.cs with 96% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.Vector64.UInt32.1.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/DuplicateSelectedScalarToVector64.V64.UInt32.1.cs with 96% similarity]	diff \| blob \| history
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src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector128.UInt16.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector128.UInt32.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector128.UInt64.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector64.Byte.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector64.Int16.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector64.Int32.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector64.SByte.7.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector64.Single.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector64.UInt16.3.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/StoreSelectedScalar.Vector64.UInt32.1.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/GenerateTests.csx		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/Helpers.tt		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/InsertSelectedScalarTest.template	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/LoadAndInsertScalarTest.template	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/StoreSelectedScalarTest.template	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/_ImmBinaryOpTestTemplate.template		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/_ImmTernaryOpTestTemplate.template		diff \| blob \| history
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.PlatformNotSupported.cs		diff \| blob \| history
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs		diff \| blob \| history
src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs		diff \| blob \| history

Domain: Dotnet / Core;

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