[MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for...
authorAnton Sidorenko <anton.sidorenko@syntacore.com>
Thu, 20 Oct 2022 15:07:43 +0000 (18:07 +0300)
committerAnton Sidorenko <anton.sidorenko@syntacore.com>
Thu, 1 Dec 2022 13:30:51 +0000 (16:30 +0300)
commita21bbc24d306892136240f31e68c607775a6d7a3
tree1054af75f1089bf01feb6cf02d87ef24e074714f
parentd4d4942911bfb1e26e99dbea38c8c235543b30a7
[MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV

To check reassociation correctness for RISCV, we must ensure that the root and
it's sibling have equal rounding modes (for floating point instructions).
`hasReassociableSibling` is a good place to make additional target-dependend
checks.

This patch allows us to enable default machine combiner mechanism to gather
reassociation candidates on RISCV.

Differential Revision: https://reviews.llvm.org/D138302
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.h