Revert "RegAllocFast: Record internal state based on register units"
authorHans Wennborg <hans@chromium.org>
Tue, 15 Sep 2020 08:47:02 +0000 (10:47 +0200)
committerHans Wennborg <hans@chromium.org>
Tue, 15 Sep 2020 11:25:41 +0000 (13:25 +0200)
commita21387c65470417c58021f8d3194a4510bb64f46
treeedbea952df70af7d15f119afd5f98d8f1925b52a
parent6c1f2a34fbcaa57c3dc0de3f9e4da58da7f328b6
Revert "RegAllocFast: Record internal state based on register units"

This seems to have caused incorrect register allocation in some cases,
breaking tests in the Zig standard library (PR47278).

As discussed on the bug, revert back to green for now.

> Record internal state based on register units. This is often more
> efficient as there are typically fewer register units to update
> compared to iterating over all the aliases of a register.
>
> Original patch by Matthias Braun, but I've been rebasing and fixing it
> for almost 2 years and fixed a few bugs causing intermediate failures
> to make this patch independent of the changes in
> https://reviews.llvm.org/D52010.

This reverts commit 66251f7e1de79a7c1620659b7f58352b8c8e892e, and
follow-ups 931a68f26b9a3de853807ffad7b2cd0a2dd30922
and 0671a4c5087d40450603d9d26cf239f1a8b1367e. It also adjust some
test expectations.
47 files changed:
llvm/lib/CodeGen/RegAllocFast.cpp
llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
llvm/test/CodeGen/AArch64/popcount.ll
llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
llvm/test/CodeGen/AMDGPU/spill-m0.ll
llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
llvm/test/CodeGen/ARM/legalize-bitcast.ll
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll
llvm/test/CodeGen/Mips/atomic-min-max.ll
llvm/test/CodeGen/Mips/atomic.ll
llvm/test/CodeGen/Mips/implicit-sret.ll
llvm/test/CodeGen/PowerPC/addegluecrash.ll
llvm/test/CodeGen/PowerPC/popcount.ll
llvm/test/CodeGen/PowerPC/vsx.ll
llvm/test/CodeGen/SPARC/fp16-promote.ll
llvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
llvm/test/CodeGen/X86/atomic-unordered.ll
llvm/test/CodeGen/X86/atomic32.ll
llvm/test/CodeGen/X86/atomic64.ll
llvm/test/CodeGen/X86/avx-load-store.ll
llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
llvm/test/CodeGen/X86/crash-O0.ll
llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
llvm/test/CodeGen/X86/fast-isel-nontemporal.ll
llvm/test/CodeGen/X86/lvi-hardening-loads.ll
llvm/test/CodeGen/X86/mixed-ptr-sizes.ll
llvm/test/CodeGen/X86/pr1489.ll
llvm/test/CodeGen/X86/pr27591.ll
llvm/test/CodeGen/X86/pr30430.ll
llvm/test/CodeGen/X86/pr30813.ll
llvm/test/CodeGen/X86/pr32241.ll
llvm/test/CodeGen/X86/pr32284.ll
llvm/test/CodeGen/X86/pr32340.ll
llvm/test/CodeGen/X86/pr32345.ll
llvm/test/CodeGen/X86/pr32451.ll
llvm/test/CodeGen/X86/pr34592.ll
llvm/test/CodeGen/X86/pr39733.ll
llvm/test/CodeGen/X86/pr44749.ll
llvm/test/CodeGen/X86/pr47000.ll
llvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir
llvm/test/CodeGen/X86/swift-return.ll
llvm/test/CodeGen/X86/swifterror.ll
llvm/test/DebugInfo/X86/op_deref.ll