clk: uniphier: Add PCIe clock entry
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Tue, 6 Jul 2021 10:01:06 +0000 (19:01 +0900)
committerTom Rini <trini@konsulko.com>
Wed, 14 Jul 2021 20:48:05 +0000 (16:48 -0400)
commita1b4810adbb61acb6d0efe0f7fa0588e476c8647
treee7f62c4cb816f16d0fea2c44c77fc46e6c89cbee
parentd3cffc8316129e57702962300c261ee98ebe6dc3
clk: uniphier: Add PCIe clock entry

Add clock control for PCIe controller on each SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
drivers/clk/uniphier/clk-uniphier-sys.c