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(parent: 201a944) | patch
drm/amd/display: Program self refresh control register on boot
authorSung Lee <sung.lee@amd.com>
Thu, 30 Jan 2020 16:54:52 +0000 (11:54 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 19 Mar 2020 04:03:04 +0000 (00:03 -0400)
commita19620ea917b4a080f5e3c923e2c09420099ae3e
tree3f17ad877e5a1c74b2b3a7899e8242544ab8a3b6tree | snapshot
parent201a94469fa914e674f73fef446fc9cad02fb00ccommit | diff
drm/amd/display: Program self refresh control register on boot

[WHY]
In headless boot cases, self refresh control registers are not
programmed on boot. In certain hybrid graphics cases this may cause
cstate entering to get blocked causing a hang.

[HOW]
Program self refresh control register on boot.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c diff | blob | history
Domain: System / Kernel;