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[RISCV] Support LLVM IR intrinsics for xsfvcp extension.
authorNelson Chu <nelson.chu@sifive.com>
Wed, 18 May 2022 09:26:16 +0000 (02:26 -0700)
committer4vtomat <brandon.wu@sifive.com>
Mon, 24 Apr 2023 10:10:13 +0000 (03:10 -0700)
commita1615b5210118e8fbc4c78c8cabb0c8d00061e6c
treede43241fff266ec1a5c6e0cced3c13b8fbbdf4betree | snapshot
parent73f4f56c9fc87f81e3172dcf101ca63c772032a6commit | diff
[RISCV] Support LLVM IR intrinsics for xsfvcp extension.

The sf.vc.x and sf.vc.i intrinsics don't have any vector types in the output
and inputs, but the intrinsic spec said that we still need to add vetvli for
them. Therefore, we need to encode the VTYPE to these IR names.

Differential Revision: https://reviews.llvm.org/D147934
llvm/include/llvm/IR/IntrinsicsRISCV.td diff | blob | history
llvm/include/llvm/IR/IntrinsicsRISCVXsf.td [new file with mode: 0644] blob
llvm/lib/Target/RISCV/RISCVISelLowering.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td diff | blob | history
llvm/test/CodeGen/RISCV/rvv/xsfvcp-x.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/xsfvcp-xv.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvv.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvw.ll [new file with mode: 0644] blob
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