strider: use optimised bus timing for FPGA access
authorReinhard Pfau <reinhard.pfau@gdsys.cc>
Wed, 16 Mar 2016 08:20:13 +0000 (09:20 +0100)
committerStefan Roese <sr@denx.de>
Mon, 21 Mar 2016 08:20:37 +0000 (09:20 +0100)
commita119357c43a4d4bd0e488a701255bcfea8f8bf6c
tree158ed8e068ebbfa6b283937fe6c98b3c41a56d9b
parent4709805657db221b05192d575392ebfd977ee1d2
strider: use optimised bus timing for FPGA access

Use optimised bus timing for FPGA access.

Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
include/configs/strider.h