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(parent: 7975e3b) | patch
[AArch64] Extend load insert into zero patterns to SVE.
authorDavid Green <david.green@arm.com>
Mon, 6 Mar 2023 23:26:08 +0000 (23:26 +0000)
committerDavid Green <david.green@arm.com>
Mon, 6 Mar 2023 23:26:08 +0000 (23:26 +0000)
commita10ac6554db4dee93232139d5c29f8d91ee01f3b
tree365276b18c79dd02c30915e625841d3ef6616516tree | snapshot
parent7975e3b1255d8506b7a4c9a33ab91c39291996bacommit | diff
[AArch64] Extend load insert into zero patterns to SVE.

This extends the patterns for loading into the zeroth lane of a zero vector
from D144086 to SVE, which work in the same way as the existing patterns. Only
full length vectors are added here, not the narrower floating point vector
types.
llvm/lib/Target/AArch64/AArch64InstrInfo.td diff | blob | history
llvm/test/CodeGen/AArch64/load-insert-zero.ll diff | blob | history
Domain: System / Toolchain;