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[AMDGPU] divergence patterns for the BUILD_VECTOR i16, undef expansion.
authoralex-t <alexander.timofeev@amd.com>
Sat, 19 Mar 2022 15:12:00 +0000 (16:12 +0100)
committeralex-t <alexander.timofeev@amd.com>
Mon, 21 Mar 2022 20:11:20 +0000 (21:11 +0100)
commita0ea7ec90ff859a2b1af4514adc3643d4e3ef204
tree027bb7fa40553b958e449787b669b19379a556c1tree | snapshot
parent461b6fe470f72637e226ee7ff2722c1d76ebc549commit | diff
[AMDGPU] divergence patterns for the BUILD_VECTOR i16, undef expansion.

BUILD_VECTOR of i16 and undef gets expanded to the COPY_TO_REGCLASS.
         The latter is further lowererd to the copy instructions.
 We need to provide the correct register class for the uniform and divergent BUILD_VECTOR nodes
 to avoid VGPR to SGPR copies.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D122068
llvm/lib/Target/AMDGPU/SIInstructions.td diff | blob | history
llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll diff | blob | history
Domain: System / Toolchain;