[X86][SSE] Enable ZERO_EXTEND_VECTOR_INREG shuffle combining on SSE41 targets.
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 20 Sep 2020 15:05:10 +0000 (16:05 +0100)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 20 Sep 2020 15:05:10 +0000 (16:05 +0100)
commita0c8793ce691d77453bca9d31b0031d39d07a5b4
tree300683d892a7be528a1555a0d0b4bde042e55f12
parent2b634a9d0e144a619ba68fc064dab0771f725063
[X86][SSE] Enable ZERO_EXTEND_VECTOR_INREG shuffle combining on SSE41 targets.

Allows ZERO_EXTEND_VECTOR_INREG to be shuffle combined on all targets where it is legal.
13 files changed:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll
llvm/test/CodeGen/X86/cast-vsel.ll
llvm/test/CodeGen/X86/combine-shl.ll
llvm/test/CodeGen/X86/pmul.ll
llvm/test/CodeGen/X86/pmulh.ll
llvm/test/CodeGen/X86/psubus.ll
llvm/test/CodeGen/X86/slow-pmulld.ll
llvm/test/CodeGen/X86/vec_int_to_fp.ll
llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
llvm/test/CodeGen/X86/vector-pcmp.ll
llvm/test/CodeGen/X86/vector-zext.ll
llvm/test/CodeGen/X86/widen_conv-4.ll