[PowerPC] Change VSRpRC allocation order
authorQiu Chaofan <qiucofan@cn.ibm.com>
Fri, 25 Jun 2021 08:00:07 +0000 (16:00 +0800)
committerQiu Chaofan <qiucofan@cn.ibm.com>
Fri, 25 Jun 2021 08:04:41 +0000 (16:04 +0800)
commita08fc1361aa307874045edde8c7af7642f4713a0
treee9143e76baad606dcd08c85a32f9247a976b476f
parentd07f43641f98a8e0024cf8e94ef98c7c912221d9
[PowerPC] Change VSRpRC allocation order

On PowerPC, VSRpRC represents the pairs of even and odd VSX register,
and VRRC corresponds to higher 32 VSX registers. In some cases, extra
copies are produced when handling incoming VRRC arguments with VSRpRC.

This patch changes allocation order of VSRpRC to eliminate this kind of
copy.

Stack frame sizes may increase if allocating non-volatile registers, and
some other vector copies happen. They need fix in future changes.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D104855
llvm/lib/Target/PowerPC/PPCRegisterInfo.td
llvm/test/CodeGen/PowerPC/dform-pair-load-store.ll
llvm/test/CodeGen/PowerPC/loop-p10-pair-prepare.ll
llvm/test/CodeGen/PowerPC/mma-acc-memops.ll
llvm/test/CodeGen/PowerPC/mma-acc-spill.ll
llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
llvm/test/CodeGen/PowerPC/mma-outer-product.ll
llvm/test/CodeGen/PowerPC/mma-phi-accs.ll
llvm/test/CodeGen/PowerPC/more-dq-form-prepare.ll
llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll
llvm/test/CodeGen/PowerPC/spill-vec-pair.ll