[AArch64][gas] Update MTE system register encodings
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Thu, 22 Aug 2019 09:20:01 +0000 (10:20 +0100)
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>
Thu, 22 Aug 2019 09:20:01 +0000 (10:20 +0100)
commita051e2f3e0c1cedf4be0e1fedcd383fd203c769c
tree6683cd0307952826230ed8d7319ce0f67a082592
parentbaf46cd78048e1b959462567556e1de1ef6b9039
[AArch64][gas] Update MTE system register encodings

The MTE specification adjusted the encoding of the TFSRE0_EL1, TFSR_EL1, TFSR_EL2, TFSR_EL3, TFSR_EL12 system registers.
This patch brings binutils up to date.

The references for the encodings are at:
https://developer.arm.com/docs/ddi0595/latest/aarch64-system-registers/tfsre0_el1 (also contains TFSR_EL12 description)
https://developer.arm.com/docs/ddi0595/latest/aarch64-system-registers/tfsr_el1
https://developer.arm.com/docs/ddi0595/latest/aarch64-system-registers/tfsr_el2
https://developer.arm.com/docs/ddi0595/latest/aarch64-system-registers/tfsr_el3

Tested check-gas for aarch64-none-elf.

opcodes/

* aarch64-opc.c (aarch64_sys_regs): Update encoding of tfsre0_el1,
tfsr_el1, tfsr_el2, tfsr_el3, tfsr_el12.
(aarch64_sys_reg_supported_p): Update checks for the above.

gas/

    * testsuite/gas/aarch64/sysreg-4.d: Update expected disassembly for
    tfsre0_el1, tfsr_el1, tfsr_el2, tfsr_el3, tfsr_el12 system registers.
gas/ChangeLog
gas/testsuite/gas/aarch64/sysreg-4.d
opcodes/ChangeLog
opcodes/aarch64-opc.c