mips: traps: Set WG bit in EBase register on Octeon
authorStefan Roese <sr@denx.de>
Thu, 14 May 2020 09:59:06 +0000 (11:59 +0200)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Sat, 18 Jul 2020 12:23:25 +0000 (14:23 +0200)
commita02bc1f99275a17e1d29886c8c69398e9313842d
tree96ea7d1679416a235d2412e7123b2dc50eb0dc7e
parenta414281da4ce0761e898309fee4c489d43b4abb6
mips: traps: Set WG bit in EBase register on Octeon

WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of
the exception base register.

Signed-off-by: Stefan Roese <sr@denx.de>
arch/mips/include/asm/mipsregs.h
arch/mips/lib/traps.c